Department of Informatics Technische Universität München Informatik X: Rechnertechnik und Rechnerorganisation / Parallelrechnerarchitektur Prof. Dr. Arndt Bode , Prof. Dr. Hans Michael Gerndt

The SMiLE project utilize the Scalable Coherent Interface (SCI) as the interconnection technology. This network fabric, which is standardized in the IEEE standard 1596-1992, utilizes a state of the art split transaction protocol and currently offers bandwidths of up to 400 MB/s (soon to be 8000 MB/s). The base topology for SCI networks are small ringlets of up to 8 nodes which hierarchically can be organized to configurations of up to 64K nodes.

SCI's flexibility stems mainly from its communication protocol: In contrast to many former systems, it is not only restricted to either message-based or shared-memory programming models. Instead, it rather combines both, taking advantage of similar properties that have been investigated in such hybrid machines as Stanford's FLASH or MIT's Alewife architecture. By also providing a distributed directory-based cache coherence protocol, it is up to the computer architect to choose from a broad range of execution models, including efficient message passing architectures as well as shared-memory models that can feature both of its NUMA or CC-NUMA variants.

The core feature of SCI based networks is the ability to perform remote memory operations through direct hardware distributed shared memory (DSM) support. The figure below gives a general overview of how this capability can be applied. The basis is formed by the SCI physical address space which allows addressing of any physical memory location on any connected node through a 64 bit identifier (16 bit to specify the node, 48 bit to specify the physical address). From this global address space, each node can import pieces of remote memory into a designated address window within the PCI address space using special address translation tables on the SCI adapter cards. After mapping the PCI address space into the virtual memory of a process, the remote memory can be directly accessed using standard user--level read and write operations. The SCI hardware forwards these operations transparently to the remote node and, in case of a read operation, returns the result. Due to the pure hardware implementation avoiding any software overhead, extremely low latencies of about 1.8 us (one way) can be achieved.

More information about SCI can be found at:

• Proceedinsg of the 2nd international conference on SCI-based Technology and Research
• SCIzzl: Association of SCI users, programmers, and manufacturers
• Dolphin: the largest manufacturer of SCI equipment
• SCALI: An SCI systems integrator
• The Siemens HPC-line based on SCI
• The currently largest SCI based installation with 192 CPUs

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