Department of Informatics Technische Universität München Informatik X: Rechnertechnik und Rechnerorganisation / Parallelrechnerarchitektur Prof. Dr. Arndt Bode , Prof. Dr. Hans Michael Gerndt

 Test and maintenance (T&M) buses are typically used to provide a minimally-intrusive path to every hardware module in the system to isolate and
 debug  failures, and possibly reconfigure data flows and computational elements to avoid failed elements. This bus can be included as a single bus for
 non-critical systems or as a doubly (or even triply) redundant bus for mission-critical systems. Proper use of a test and maintenance bus often
 requires the "cooperation" of the data and control buses, necessitating some sort of controller element.

 There are many flavours of T&M buses nowadays, some of using a two-wire half-duplex serial connection (I2C based) others use multi-wire
 bidirectional serial buses, mainly TM and MTM. As said above, these buses need a somewhat tight coupling to the system bus since in case of
 emergency through this bus it should at least be possible to analyze and switch off devices causing problems on the system bus or being
 misfunctional in other ways. Ideally, the T&M bus can be used to save and restore all data of any device attached to this bus to ensure proper
 checkpointing and restarting partial system functions without the need of shutting down and resetting the whole system.

 Today the situation has changed in a way that modern computers are almost always attached to some kind of network through which not only
 monitoring but also full test and maintenance should be made possible. Also, industry has concentrated on a quite cheap to implement - but not
 ideally suited for this task - T&M bus: plain I2C. Use of future bus systems such as NGIO cause new impulses: The ability to implement spare
 backup system buses which might draw separate T&M buses useless.